|Subhanshu Gupta received the B.E. degree from the National Institute of Technology (NIT) at Tiruchirappalli, Tiruchirappalli, India, in 2002, and the M.S. and Ph.D. degrees from the University of Washington, Seattle, WA, USA, in 2006 and 2010, respectively. He is currently an Associate Professor of electrical engineering and computer science with Washington State University, Pullman, WA, USA. He has held industrial positions at Maxlinear (Irvine, CA) where he worked on wideband transceivers for SATCOM and infrastructure applications.
Subhanshu is a recipient of the National Science Foundation CAREER Award in 2019, the Department of Defense DURIP award in 2020, and the Cisco Faculty Research Award in 2017. He and his group has also been nominated and awarded multiple student awards including Analog Devices Outstanding Student Designer Award in 2008, the IEEE RFIC Symposium Best Student Paper Award (third place in 2011 and nominee in 2020), and the IEEE Applied Superconductivity Conference (nominee in 2020). Subhanshu serves as an Associate Editor for the IEEE Transactions on Circuits and Systems – I for the term 2020-23 and TPC member for IEEE Radio Frequency Integrated Circuits Symposium (RFIC) from FY2022. His research interests include large-scale phased arrays and wideband transceivers, low-power time-domain circuits and systems, and statistical hardware optimization for next-generation wireless communications, internet-of-things, and quantum applications.
|Qiuyan Xu received the B.E. degree in electronic science and technology from Xi'an Jiaotong University, Xi'an, China in 2017 and M.S. degree in electrical engineering from Washington State University, Pullman WA in 2019. She continues working towards Ph.D. degree in WSU. Research interests include time-domain circuits, high-speed mixed-signal designs, and applications in wireless communication systems.
Term: Fall 2017-Present
Email: email@example.com; LinkedIn: https://www.linkedin.com/in/qiuyan-xu/
|Daniel Mazidi received his B.S. in Electrical Engineering from Azad Science and Research University in Iran in 2011 and he went on to earn his M.S. in Electrical Engineering from San Jose State University, CA in 2016. After completion of his M.S., he worked for Alphacore from 2017 to 2020. While there he worked as a lead design engineer on various projects involving high speed ADCs and readout IC design as well as lab testing. He joined the SoC Lab at Washington State University in the Fall of 2021 and is working towards his Ph.D. His areas of interests include Analog/Mixed-Signal Circuits, High-Speed ADC, Low Power ADC, Phase-Detector CDR, and Analog Amplifiers.
Term: Fall 2021-Present
Email: firstname.lastname@example.org; LinkedIn
|Sreeni Poolakkal received the B. Tech from University of Calicut, India and M. Tech. from Indian Institute of Technology Guwahati, India. He did his Master's thesis on low power and low phase noise Oscillators. Subsequently, he joined Tata Steel automation, India. He joined System-on-Chip Lab in Fall 2021 and working towards his PhD degree. His research interests include highly linear and wide band phased arrays.
Term: Fall 2021-Present
Email: email@example.com; LinkedIn
|Halady Arpit Rao received his B.E degree from Mumbai University in 2014 and M.S. degree from Oklahoma State University in 2016. From 2017 to 2021 he was with Intel Corporation in Oregon where he worked on developing temperature sensing circuits, wireline receiver front-ends and process monitoring circuits. He joined Washington State University (Pullman, WA) in Fall 2021 and is working towards the PhD degree. His current research involves exploring high-speed wireline links. His interests include high-speed wireline and wireless transceiver design, low power mixed-signal design, device physics and silicon photonics.
Term: Fall 2021-Present
|Foad Beheshti received his B.Sc. degree from University of Tabriz, Iran, in 2013, and the M.Sc. degree from University of Tehran, Iran, in 2016. His current research interests include biomedical integrated circuits and systems and ultra-low-power wireless receivers.
Term: Fall 2022-Present
Email: firstname.lastname@example.org LinkedIn
|Dipan Kar received his MS from the Indian Institute of Technology (BHU), India. His research interests include mm-wave integrated circuits, systems, and frequency synthesizers.
Term: Fall 2020-Present
Email: email@example.com LinkedIn
|Hesam Abbasi received his BS in electrical engineering from Shahed University of Tehran, Iran, and MSc in Analog Integrated Circuit Design from the Amirkabir University of Technology, Iran. His research interests are in low noise and highly linear phased-array wideband transceivers.
Term: Fall 2021-Present
Email: firstname.lastname@example.org LinkedIn
PhD Students (Co-Advised)
|Ajinkya Kharalkar (co-advised with Prof. Rajesh Zele, IIT Bombay, India) received the combined B.Tech. and M.Tech. degree in electrical engineering from IIT Bombay, Mumbai, India, in 2019. He is currently pursuing Ph.D. degree in electrical engineering at IIT Bombay, Mumbai, India. From 2019 to 2020, he was with the Indian Space Research Organization (ISRO), Thiruvananthapuram, India, as a Scientist/Engineer in the application-specific integrated circuit (ASIC) development cell. His research interests include analog and radio frequency CMOS integrated circuits for phased-array receivers. Mr. Kharalkar is a recipient of the Prime Minister’s Research Fellowship Award by the Ministry of Education, Government of India.
|Soumen Mohapatra (co-advised with Prof. Deuk Heo) received his B. Tech degree from National Institute of Technology Rourkela, India in 2015. He was working in CMOS Image sensor group of ON Semiconductor for 2 years and in PMIC team of Samsung R&D, India for 2 years. He joined Washington State University (Pullman, WA) in Fall 2019 and is working towards his PhD degree. His research interests include Frequency synthesizers, Switched Inductor Capacitor Voltage Regulator, Mixed Signal Circuit Design.
Term: Fall 2019-present
Email: “Soumen Mohapatra” <email@example.com>; LinkedIn
|Dr. Chung-Ching Lin (Fall'18-Fall'22)
Dissertation: DESIGN TECHNIQUES FOR TIME-BASED SIGNAL PROCESSORS IN NEXT-GENERATION WIRELESS COMMUNICATION TRANSCEIVERS
First Job: Qualcomm, San Diego (Staff Design Engineer)
Email: firstname.lastname@example.org; LinkedIn
|Dr. Erfan Ghaderi (Fall'16-Spr'20)
Dissertation: ANALOG/MIXED-SIGNAL SPATIAL SIGNAL PROCESSING FOR WIDEBAND MULTI-ANTENNA RECEIVERS
First Job: Intel, OR
|Prof. Huan Hu (Fall'15-Sum'21)
Dissertation: FUTURE OF WIRELESS SENSOR SYSTEMS-ON-CHIP: VOLTAGE-BASED VS TIME-BASED SENSING TECHNIQUES
First Job: Assistant Professor, Southern University of Science and Technology, China
|Shrestha Bansal (Fall'15-Fall'23)
First Job: Design Engineer, Apple, Cupertino, CA
MS Thesis Alum
|Adam Slater Spr'21-Sum'23 (M.S. Thesis)
First Job: Ph.D. at University of Virginia
Email: "Adam Slater" <email@example.com>
|Leonardo B. Carreira
Term: Fall'16-Sum'19 (UG Researcher)
Term: Fall'19-present (M.S. Thesis)
First Job: Qualcomm, San Diego
Email: "Leonardo Carreira" <firstname.lastname@example.org>
|Yuling Liu (Fall'19-Fall'21)
Dissertation: ANALYSIS AND DESIGN OF AN ULTRA-LOW POWER LOW-NOISE DTMOS BASED INSTRUMENTATION AMPLIFIER APPLIED TO THE PHYSIOLOGICAL SIGNAL ACQUISITION SYSTEM
First Job: WingComm, Shanghai
|Chase Puglisi (Fall'18-Summer'20)
Dissertation: CHARGE AND TIME-DOMAIN DESIGN TECHNIQUES FOR TRUE-TIME-DELAY BASED SPATIAL SIGNAL PROCESSORS
First Job: Texas Instruments, AZ
|Siva Kumar Govindan (Fall'16-Fall'18)
Dissertation: LOW-JITTER LOW-VOLTAGE RELAXATION OSCILLATOR DESIGN TECHNIQUES FOR XTAL-FREE RADIOS
First Job: Invensense, San Jose Current job: Qualcomm, AZ
|Arya Rahimi (Spring'15-Spring'18)
Dissertation: Design of a Low-Power Information-Aware Sampling Architecture using Learning-based Feedback Techniques
First Job: Philips Healthcare, Bothell, WA
|Peter Osheroff (Spring'15-Fall'15) (co-advised with Prof. George La Rue)
Dissertation: DESIGN OF A VOLTAGE-TO-TIME CONVERTER AND TIME-TO-DIGITAL CONVERTER
First Job: Intel, OR
- Anika Raisa Khan (UG WSU, senior design and SoC lab intern, Sum’22-Spr’23) – now at Schweitzer Engineering Lab, Pullman.
- Jay Kamat (BITS Pilani, SoC intern, Fall’21-Sum’22 (virtual), Fall’22-Spr’23 (in-person)) – now at Univ. of Toronto
- Jayce Gaddis (senior design and SoC intern, Spr’21-Fall’21)
- Kaylee Travino (REU student, summer’20) (with Prof. Larry Holder)
- Tyler Dickey (Spring’20-Fall’20)
- Paige Danielson, (Fall’18-Summer’19)
– MS / PhD: University of Colorado Boulder
- Collin Kummer (NSF-REU, Senior Design Spring’19-Fall’19)
- Joseph Summers (NSF-REU, Senior Design, Spring’19-Fall’19)
- Ji-Hyun Bok (NSF-REU, Summer’19)
- Biniyam Obsu (NSF-REU, Senior Design Fall’16-Spr’17)
- Prateek Gaur (Senior Design Fall’16-Spr’17)
- Robert Wood (Senior Design Fall’16-Spr’17)
- Miles Drew Everest (Senior Design Fall’16-Spr’17)
- Chase Puglisi (Senior Design Fall’16-Spr’17)
- Jon Clements (Senior Design Fall’15-Spr’16)
- Luke Liu Darrow (Senior Design Fall’15-Spr’16)
- Mackenzie Marie Meade (Senior Design Fall’15-Spr’16)
- Huong Thi Dieu Doan (Senior Design Fall’15-Spr’16)
- David Brent Hoekman (Senior Design Fall’15-Spr’16)